Multi-Rate 100g Qsfp28 Lr4 Transceiver Module

• Customization: Available
• Usage: Telephone, Computer, Workstation, Server, Mobile phone, Data Center
• Type: Both Wired and Wireless
• Model NO.: LAQ28-LR4-D
• Support Network: Ethernet, GPRS, Data, Voice
• Information content: Data, Voice, Message
• Certification: CE, ISO, RoHS, FCC
• Condition: New
• Transport Package: Blister Pack
• Specification: Size: 22*20*8CM
• Trademark: Link-All
• Origin: China
• HS Code: 8517706000
• Production Capacity: 100, 000 Per Year
• Package Size: 22.00cm * 20.00cm * 8.00cm
• Package Gross Weight: 0.500kg

Product Description

Multi-rate 100G QSFP28 LR4 Transceiver Module
LAQ28-LR4-D

Product Description

Link-all's LAQ28-LR4-D module are designed for 10 km optical communication applications, and it is compliant to IEEE 802.3ba for 100GE Ethernet and ITU-T 4I1-9D1F for OTU-4. This module contains 4-lane optical transmitter, 4-lane optical receiver and module management block including 2 wire serial interfaces. The optical signals are multiplexed to a single-mode fiber through an industry standard LC connector.


Product Features
QSFP28 MSA compliant
Compliant to IEEE 802.3ba 100GBASE-LR4 and OTN OTU4 4I1-9D1F
Digital diagnostic monitoring support
Hot pluggable 38 pin electrical interface
4 LAN-WDM lanes MUX/DEMUX design
4x25G & 4x28G electrical interface
Maximum power consumption 4 W
LC duplex receptacle
Supports 103. 125 Gbps and 111.81 Gbps aggregate bit rate
Up to 10 km transmission on single mode fiber
Operating case temperature: 0ºC to +70ºC
Single 3.3V power supply
RoHS 2 compliant


Applications
100GBASE-LR4 Ethernet
OTN OTU4 4I1-9D1F
Telecom networking
Data Center Interconnect
Enterprise networking
 

Product Parameters

Ordering Information
 

Ordering P/Ns	Description
LAQ28-LR4-D	100/112Gbps   QSFP28    LR4   Transceiver    10KM   DDM,    LC    Receptacle, Commercial Temperature

Notes:
If you need more customized services, please contact us.


Transceiver Block Diagrams

Function Description
ModSelL:
The ModSelL is an input pin. When held low by the host, the module responds to 2-wire serial communication commands. The ModSelL allows the use of multiple modules on a single 2-wire interface bus. When the ModSelL is "High", the module shall not respond to or acknowledge any 2-wire interface communication from the host. ModSelL signal input node shall be biased to the "High" state in the module.
In order to avoid conflicts, the host system shall not attempt 2-wire interface communications within the ModSelL de-assert time after any  modules are deselected. Similarly, the  host shall wait at  least for the  period of the ModSelL assert time  before communicating with the  newly selected  module. The assertion and de-asserting periods of different modules may overlap as long as the above timing requirements are met.
ResetL:
The ResetL pin shall be pulled to Vcc in the module. A low level on the ResetL pin for longer than the minimum pulse length (t_Reset_init) initiates a complete module reset, returning all user module settings to their default state. Module Reset Assert Time (t_init) starts on the rising edge after the low level on the ResetL pin is released. During  the  execution  of  a  reset  (t_init)  the  host  shall  disregard  all  status  bits  until  the  module  indicates  a completion  of  the  reset  interrupt.  The  module  indicates  this  by  asserting  "low"  an  IntL  signal  with   the Data_Not_Ready  bit  negated.  Note  that  on  power  up  (including  hot  insertion)  the  module  should  post  this completion of reset interrupt without requiring a reset.
LPMode:
The LPMode pin shall be pulled up to Vcc in the module. The pin is a hardware control used to put modules into a low power mode when high. By using the LPMode pin and a combination of the Power override, Power_set and High_Power_Class_Enable software control bits (Address A0h, byte 93 bits 0, 1,2). The host controls how much
power a module can consume.
ModPrsL:
ModPrsL is pulled up to Vcc_Host on the host board and grounded in the module. The ModPrsL is asserted "Low" when inserted and deasserted "High" when the module is physically absent from the host connector.
IntL:
IntL is an output pin. When IntL is "Low", it indicates a possible module operational fault or a status critical to the host system. The host identifies the source of the interrupt using the 2-wire serial interface. The IntL pin is an open collector output and shall be pulled to host supply voltage on the host board. The INTL pin is deasserted "High" after completion of reset, when byte 2 bit 0 (Data Not Ready) is read with a value of '0' and the flag field is read (see SFF-8636).

Absolute Maximum Ratings
It has to be noted that the operation in excess of any individual absolute maximum ratings might cause permanent
damage to this module.

 

Parameter	Symbol	Min	Typ	Max	Units
Storage Temperature	TS	-40		+85	ºC
Supply Voltage	VCC	-0.5	3.3	3.6	V
Relative Humidity (non-condensing)	RH	5		85	%
Damage Threshold, each lane	THd	5.5			dBm

Recommended Operating Conditions and Power Supply Requirements

Optical and electrical characteristics below are defined under this operating environment, unless
otherwise specified.
 

Parameter	Symbol	Min	Typ	Max	Unit
Supply Voltage	Vcc	3.135	3.3	3.465	V
Case Temperature	Top	0		+70	ºC
Link Distance with G.652		0.002		10	km

Optical Characteristics
100GBASE-LR4 Operation(EOL, TOP  = 0 to +70ºC , VCC  = 3. 135 to 3.465 Volts)
 

Parameters	Min	Typ	Max	Unit	Note
Transmitter
Signaling Speed per Lane	25.78125  ±  100 ppm			Gb/s
Transmit wavelengths	1294.53	1295.56	1296.59	nm
	1299.02	1300.05	1301.09
	1303.54	1304.58	1305.63
	1308.09	1309.14	1310.19
Total Average Launch Power			+10.5	dBm
Average launch power, each lane	-4.3		+4.5	dBm
Optical Modulation Amplitude (OMA), each lane	- 1.3		+4.5	dBm
Extinction Ratio (ER)	4			dB
Side-Mode Suppression Ratio (SMSR)	30			dB
Launch power in OMA minus TDP, each lane	-2.3			dBm
Transmitter and Dispersion Penalty (TDP), each lane			2.2	dB
Transmitter reflectance			- 12	dB
Transmitter eye mask definition {X1, X2, X3, Y1, Y2, Y3}	{0.25, 0.4, 0.45, 0.25, 0.28, 0.4}				1
Receiver
Signaling Speed per Lane	25.78125  ±  100 ppm			Gb/s
Receive wavelengths	1294.53	1295.56	1296.59	nm
	1299.02	1300.05	1301.09
	1303.54	1304.58	1305.63
	1308.09	1309.14	1310.19
Average receiver power, each lane	- 10.6		+4.5	dBm
Receiver power, each lane (OMA)			+4.5	dBm
Channel power difference			5.5	dB
Damage threshold, each lane	+5.5			dBm
Receiver sensitivity (OMA), each lane			-8.6	dBm	2
Stressed receiver Sensitivity (OMA) , each lane			-6.8	dBm	2
LOS Assert	-26			dBm
LOS Deassert			- 13	dBm
LOS Hysteresis	0.5			dB
Receiver reflectance			-26	dB
Vertical eye closure penalty, each lane		1.8		dB
Stressed eye J2 Jitter, each lane		0.3		UI
Stressed eye J9 Jitter, each lane		0.47		UI

Notes:
1.Hit ratio 5  ×  10−5
2.Sensitivity is specified at BER@1E- 12 without FEC


OTU4 4I1-9D1F Operation (EOL, TOP  = 0 to +70°C, VCC  = 3. 135 to 3.465 Volts)
 

Parameters	Min	Typ	Max	Unit	Note
Transmitter
Signaling Speed per Lane	27.9525  ±  20 ppm			Gb/s
Transmit wavelengths	1294.53	1295.56	1296.59	nm
	1299.02	1300.05	1301.09
	1303.54	1304.58	1305.63
	1308.09	1309.14	1310.19
Total average launch power			+8.9	dBm
Average launch power, each lane	-2.5		+2.9	dBm
Extinction ratio (ER)	7		-	dB
Maximum channel power difference			5	dB
Transmitter eye mask definition {X1, X2, X3, Y1, Y2, Y3}	{0.25, 0.4, 0.45, 0.25, 0.28, 0.4}				1
Receiver
Signaling Speed per Lane	27.9525  ±  20 ppm			Gb/s
Receive wavelengths	1294.53	1295.56	1296.59	nm
	1299.02	1300.05	1301.09
	1303.54	1304.58	1305.63
	1308.09	1309.14	1310.19
Average receiver power, each lane	-8.8		+2.9	dBm
Channel power difference			5.5	dB
Damage threshold, each lane	+5.5			dBm
Maximum optical path penalty			1.5	dB
Equivalent sensitivity			- 10.3	dBm	2
LOS assert	-26			dBm	2
LOS deassert			- 13	dBm
LOS hysteresis	0.5			dB
Receiver reflectance			-26	dB

Notes:
1.Hit ratio 5  ×  10−5
2.Sensitivity is specified at BER@5E-5 with FEC


Electrical Characteristics
 

Parameter	Symbol	Min	Typ	Max	Unit	Note
Power dissipation				4	W
Supply Current	Icc			1.1544	A	Steady state
Transmitter
Data Rate, each lane			25.78125 27.9525		Gbps
Differential input Voltage swing	Vin, pp			900	mV	At 1 MHz
Transition time	Trise/Tfall	10			ps	20%~80%
Differential Termination Resistance Mismatch				10	%
Eye width	EW15	0.46			UI
Eye height	EH15	95			mV
Receiver
Data Rate, each lane			25.78125 27.9525		Gbps
Differential Termination Resistance Mismatch				10	%	At 1 MHz
Differential output voltage swing	Vout,pp			900	mVpp
Common Mode Noise, RMS	Vrms			17.5	mV
Transition time	Trise/Tfall	12			ps	20%~80%
Eye width	EW15	0.57			UI
Eye height	EH15	228			mV
Transmitter
Data Rate, each lane			25.78125 27.9525		Gbps
Differential input Voltage swing	Vin, pp			900	mV	At 1 MHz
Transition time	Trise/Tfall	10			ps	20%~80%
Differential Termination Resistance Mismatch				10	%
Eye width	EW15	0.46			UI
Eye height	EH15	95			mV
Receiver
Data Rate, each lane			25.78125 27.9525		Gbps
Differential Termination Resistance Mismatch				10	%	At 1 MHz
Differential output voltage swing	Vout,pp			900	mVpp
Common Mode Noise, RMS	Vrms			17.5	mV
Transition time	Trise/Tfall	12			ps	20%~80%
Eye width	EW15	0.57			UI
Eye height	EH15	228			mV

Pin Assignment

Pin Function Definitions
 

Pin	Symbol	Description	Notes
1	GND	Ground	1
2	Tx2n	Transmitter Inverted Data Input
3	Tx2p	Transmitter Non-Inverted Data Input
4	GND	Ground	1
5	Tx4n	Transmitter Inverted Data Input
6	Tx4p	Transmitter Non-Inverted Data Input
7	GND	Ground	1
8	ModSelL	Module Select
9	ResetL	Module Reset
10	Vcc Rx	+3.3V Power Supply Receiver
11	SCL	2-wire serial interface clock
12	SDA	2-wire serial interface data
13	GND	Ground	1
14	Rx3p	Receiver Non-Inverted Data Output
15	Rx3n	Receiver Inverted Data Output
16	GND	Ground	1
17	Rx1p	Receiver Non-Inverted Data Output
18	Rx1n	Receiver Inverted Data Output
19	GND	Ground	1
20	GND	Ground	1
21	Rx2n	Receiver Inverted Data Output
22	Rx2p	Receiver Non-Inverted Data Output
23	GND	Ground	1
24	Rx4n	Receiver Non-Inverted Data Output
25	Rx4p	Receiver Inverted Data Output
26	GND	Ground	1
27	ModPrsL	Module Present
28	IntL	Interrupt
29	Vcc Tx	+3.3V Power supply transmitter
30	Vcc1	+3.3V Power supply
31	LPMode	Low Power Mode
32	GND	Ground	1
33	Tx3p	Transmitter Non-Inverted Data Input
34	Tx3n	Transmitter Inverted Data Input
35	GND	Ground	1
36	Tx1p	Transmitter Non-Inverted Data Input
37	Tx1n	Transmitter Inverted Data Input
38	GND	Ground	1

Notes:
1.Circuit ground is internally isolated from chassis ground.
 

Certifications

Company Profile

Being a leading manufacturer of opical transceivers, we produce all kinds of optical transceivers from 1.25G to 800G, CWDM/DWDM/FWDM, Media Converters, PLC Spliters.. We have been in this field for about 15 years. Having attended many international fairs, we have been supplying to established companies worldwide. In general, we have rich experience in working with those big companies who value qualty much. So you may trust us on our product quality.